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- 1970-1-1
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a0a.1 0b0c
stm8/
#include "mapping.inc"
#include "stm8s105c6.inc"
segment 'rom'
main.l
; initialize SP
ldw X,#stack_end
ldw SP,X
#ifdef RAM0
; clear RAM0
ram0_start.b EQU $ram0_segment_start
ram0_end.b EQU $ram0_segment_end
ldw X,#ram0_start
clear_ram0.l
clr (X)
incw X
cpw X,#ram0_end
jrule clear_ram0
#endif
#ifdef RAM1
; clear RAM1
ram1_start.w EQU $ram1_segment_start
ram1_end.w EQU $ram1_segment_end
ldw X,#ram1_start
clear_ram1.l
clr (X)
incw X
cpw X,#ram1_end
jrule clear_ram1
#endif
; clear stack
stack_start.w EQU $stack_segment_start
stack_end.w EQU $stack_segment_end
ldw X,#stack_start
clear_stack.l
clr (X)
incw X
cpw X,#stack_end
jrule clear_stack
;烧程序前要先将PB3引脚的第二功能通过STVP改为TM1_ETR;
intel
BRES PB_DDR,#3 ;初始化TIM1_ETR为无中断功能的输入方式;
BSET PB_CR1,#3
BRES PB_CR2,#3
BSET PD_DDR,#0 ;初始化PD0和PD7为推挽输出;将PD0的PWM信号输入TIM1_ETR中;
BSET PD_CR1,#0
BRES PD_CR2,#0
BSET PD_DDR,#7
BSET PD_CR1,#7
BRES PD_CR2,#7
;计数器初始化
MOV TIM3_PSCR,#5 ;初始化预分频器TIM2_PSCR
MOV TIM3_ARRH,#{HIGH 50000} ;初始化自动重装初值寄存器TIM2_ARR
MOV TIM3_ARRL,#{LOW 50000}
;初始化控制寄存器TIM2_CR1,定义为向上计数、允许更新、仅允行砑剖饕绯鍪敝卸媳曛居行А⑵舳ㄊ逼?
MOV TIM3_CR1,#05H
;初始化输出比较
MOV TIM3_CCMR2,#1101000B ;选择输出比较方式、选择输出比较嫫鞯脑ぷ霸毓δ堋⒀≡馪WM1模式
MOV TIM3_CCR2H,#{HIGH 25000} ;初始化TIMX_CCRn
MOV TIM3_CCR2L,#{LOW 25000}
BRES TIM3_CCER1,#5 ;初始化捕获\比较使能寄存器?
BSET TIM3_CCER1,#4
;外部时钟模式2
MOV TIM1_ETR,#11010000B ;ETP为选择触发极性(0不反相,1反相),ETPS位选择外触发输入信号的分频系数,ETR为1,选择外部时钟;
MOV TIM1_SMCR,#00H ;将SMS置0;
MOV TIM1_ARRH,#{HIGH 1} ;初始化自动重装初值寄存器TIM1_ARR
MOV TIM1_ARRL,#{LOW 1}
MOV TIM1_RCR,#00H ;初始化重复计数寄存器TIM1_RCR
MOV TIM1_CR1,#04H ;初始化控制寄存器TIM1_CR1,定义为向上计数、允许更新、仅允许计数器溢出时中断标志有效;
BSET TIM1_IER,#0 ;允许中断;
BSET TIM1_CR1,#0 ;CEN=1,启动计数器;
RIM
JRT $
interrupt TIM1_interrupt_over
TIM1_interrupt_over.L
BRES TIM1_SR1,#0 ;清除更新中断标志
BCPL PD_ODR,#7
IRET
IRET
IRET
IRET
IRET
interrupt NonHandledInterrupt
NonHandledInterrupt.l
iret
motorola
segment 'vectit'
dc.l {$82000000+main} ; reset
dc.l {$82000000+NonHandledInterrupt} ; trap
dc.l {$82000000+NonHandledInterrupt} ; irq0
dc.l {$82000000+NonHandledInterrupt} ; irq1
dc.l {$82000000+NonHandledInterrupt} ; irq2
dc.l {$82000000+NonHandledInterrupt} ; irq3
dc.l {$82000000+NonHandledInterrupt} ; irq4
dc.l {$82000000+NonHandledInterru pt} ; irq5
dc.l {$82000000+NonHandledInterrupt} ; irq6
dc.l {$82000000+NonHandledInterrupt} ; irq7
dc.l {$82000000+NonHandledInterrupt} ; irq8
dc.l {$82000000+NonHandledInterrupt} ; irq9
dc.l {$82000000+NonHandledInterrupt} ; irq10
dc.l {$82000000+TIM1_interrupt_over} ; irq11
dc.l {$82000000+NonHandledInterrupt} ; irq12
dc.l {$82000000+NonHandledInterrupt} ; irq13
dc.l {$82000000+NonHandledInterrupt} ; irq14
dc.l {$82000000+NonHandledInterrupt} ; irq15
dc.l {$82000000+NonHandledInterrupt} ; irq16
dc.l {$82000000+NonHandledInterrupt} ; irq17
dc.l {$82000000+NonHandledInterrupt} ; irq18
dc.l {$82000000+NonHandledInterrupt} ; irq19
dc.l {$82000000+NonHandledInterrupt} ; irq20
dc.l {$82000000+NonHandledInterrupt} ; irq21
dc.l {$82000000+NonHandledInterrupt} ; irq22
dc.l {$82000000+NonHandledInterrupt} ; irq23
dc.l {$82000000+NonHandledInterrupt} ; irq24
dc.l {$82000000+NonHandledInterrupt} ; irq25
dc.l {$82000000+NonHandledInterrupt} ; irq26
dc.l {$82000000+NonHandledInterrupt} ; irq27
dc.l {$82000000+NonHandledInterrupt} ; irq28
dc.l {$82000000+NonHandledInterrupt} ; irq29
end |
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